High Current Test Bench for Power Electronic Devices


Nurhan Rizqy Averous


Nurhan Rizqy Averous

Oberingenieur Leistungselektronik


+49 241 80 49958


  Copyright: PGS E.ON ERC RWTH Aachen The schematic of the high-current test bench at PGS

The robustness and reliability of power semiconductor de­vices is a critical issue, especially in fault situations such as short circuits. In order to test these situations in a controlled environment and observe the consequences on the power semiconductors, a new test bench has been designed and created to analyze overcurrent events.

A new high-current test bench has been developed at the Institute for Power Generation and Storage System (PGS) of the E.ON Energy Research Center in order to determine the effect of an overcurrent (i.e. short circuit) event on semi­conductor devices, especially thyristor-type semiconductors.

The test bench is able to generate a peak current of 20 kA at a 50/60 Hz sinusoidal waveform for duration of up to 2 sec­onds. The current is controlled via an IGBT H-Bridge, which allows an effective control of the current. This configuration allows the creation of asymmetric and symmetric current waveforms. The semiconductor device under test (DUT) can be analyzed at temperatures ranging 20 °C to 150 °C.

With the help of a user interface created using LabView, all test parameters can be selected. Once this step is fulfilled, the computer will interface with all required equipment per­forming a fully automated test. At first, the supercapacitor DC-link will be charged to the minimum required voltage to perform the test. In this way, unnecessary risks are avoided and the stored amount of energy is minimized. Then, the IGBT H-Bridge will start switching in order to generate the desired current waveform for the wanted duration. Finally, the current is stopped and the selected test voltage UHS is applied to the semiconductor device to measure the block­ing capability after the overcurrent event. During all the pro­cess, all parameters such as voltage, current and tempera­ture are monitored.

The main design issue for the test bench is the low-resistance connection of all components, especially on the secondary side of the transformer. The transformer was designed spe­cifically for this test bench to provide very low ohmic losses.